A Full Adder Design with CNFETs for Real Time, Fault Tolerant and Mission Critical Applications

Abstract

The VLSI based circuits often pose challenges in the
form of various faults (such as transient faults, permanent faults,
stuck-at-faults). These faults appear even after testing also. They
occur because of reduction in the size of the circuit or during real-
time implementation, as these faults are difficult to detect. It is
very important to detect and rectify all such faults to make the system
foolproof and achieve expected functionality. In this paper, 12
transistors based, full adder circuit (12T-FAC) using Carbon Nanotube
Field Effect Transistor (CNFET) technology is proposed. The
proposed design based on CNFET provides high fault resistance
towards transient, permanent faults and works with least power,
delay and power-delay product (PDP). Later, features like fault
detection and correction circuit have been added in 12T-FAC. The
final version of full adder circuit capable of correcting errors has
been used in designing applications like multipliers. The proposed
full adder circuit was designed with CNFET technology, simulated
at 32 nm with supply voltage +0.9 V using the Cadence Virtuoso
CAD tool. The model used is Stanford PTM.